#define CPU_PORT 192
#define RECIRC_SESS_ID 20
#define RECIRC_PORT 68

/*--------- nop ----------*/
action nop() {}

/*---------- update_counter1_t ----------*/
blackbox stateful_alu update_counter1_bb
{
 reg: counter1;
 condition_lo: register_lo == 0;
 condition_hi: register_lo == ipv4.srcip;
 update_lo_1_value: ipv4.srcip;
 /* output_value: register_lo; */
 /* output_dst: m_meta.count; */
}

action update_counter1_ac()
{
  update_counter1_bb.execute_stateful_alu(0);
}

blackbox stateful_alu rewrite_counter1_bb {
 reg: counter1;
 update_lo_1_value: 99;
}

action rewrite_counter1_ac() {
  rewrite_counter1_bb.execute_stateful_alu(0);
}

table update_counter1_t {
  reads {
  ipv4.srcip: exact;
  }
  actions {
    update_counter1_ac;
    rewrite_counter1_ac;
    nop;
  }
 default_action: nop;
}

/*---------- update_counter2_t ----------*/
blackbox stateful_alu update_counter2_bb
{
 reg: counter2;
 update_lo_1_value: m_meta.count;
}

action update_counter2_ac()
{
    update_counter2_bb.execute_stateful_alu(0);
}

table update_counter2_t {
  actions {
    update_counter2_ac;
  }
 default_action: update_counter2_ac;
}

/*---------- forward_t ----------*/
action set_egr(egress_spec) {
  modify_field(ig_intr_md_for_tm.ucast_egress_port, egress_spec);
}

table forward_t {
  reads {
  ig_intr_md.ingress_port: exact;
  }
  actions {
    set_egr; nop;
  }
}

/*---------- update_export_flag_t ----------*/
blackbox stateful_alu set_export_flag_bb {
 reg: export_flag;
 update_lo_1_value: set_bit;
}

action set_export_flag_ac() {
  set_export_flag_bb.execute_stateful_alu(0);
}

blackbox stateful_alu clr_export_flag_bb {
 reg: export_flag;
 update_lo_1_value: clr_bit;
}

action clr_export_flag_ac() {
  clr_export_flag_bb.execute_stateful_alu(0);
}

table update_export_flag_t {
  actions {
    clr_export_flag_ac;
  }
 default_action: clr_export_flag_ac;
}
